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ds07-12560-1e fujitsu semiconductor data sheet 8-bit proprietary microcontroller cmos f 2 mc-8l mb89490 series mb89498/f499/pv490 n description the mb89490 series has been developed as a general-purpose version of the f 2 mc*-8l family consisting of proprietary 8-bit single-chip microcontrollers. in addition to a compact instruction set, the general-purpose, single-chip microcontroller contains a variety of peripheral functions such as 21-bit timebase timer, watch prescaler, pwm timer, 8/16-bit timer/counter, remote receiver circuit, lcd controller/driver, external interrupt 0 (edge) , external interrupt 1 (level) , 10-bit a/d converter, uart/sio, sio, i 2 c and watchdog timer reset. the mb89490 series is designed suitable for compact disc/radio receiver controller as well as in a wide range of applications for consumer product. * : f 2 mc, an abbreviation for fujitsu flexible microcontroller, is a registered trademark of fujitsu ltd. n features ? package qfp, lqfp package for mb89f499, mb89498 mqfp package for mb89pv490 (continued) n packages 100-pin plastic qfp 100-pin plastic lqfp 100-pin ceramic mqfp (ftp-100p-m06) (ftp-100p-m05) (mqp-100c-p01)
mb89490 series 2 (continued) ? high speed operating capability at low voltage ? minimum execution time : 0.32 m s/12.5 mhz ?f 2 mc-8l family cpu core ? pll circuit for sub-clock embedded for pll clock multiplication circuit for sub-clock operating clock (pll for sub-clock) can be selected from no multiplication or 4 times of the sub-clock oscillation frequency. ?6 timers pwm timer 2 8/16-bit timer/counter 2 21-bit timebase timer watch prescaler ? external interrupt edge detection (selectable edge) : 8 channels low level interrupt (wake-up function) : 8 channels ? 10-bit a/d converter (8 channels) 10-bit successive approximation type ? uart/sio synchronous/asynchronous data transfer capability ?sio switching of synchronous data transfer capability ? lcd controller/driver max 32 segments output 4 commons ?i 2 c interface circuit ? remote receiver circuit ? low-power consumption mode stop mode (oscillation stops so as to minimize the current consumption.) sleep mode (cpu stops so as to reduce the current consumption to approx. 1/3 of normal.) watch mode (operation except the watch prescaler stops so as to reduce the power comsumption to an extremely low level.) sub-clock mode ? watchdog timer reset ? i/o ports : max 66 channels instruction set optimized for controllers multiplication and division instructions 16-bit arithmetic operations branch instructions by test bit bit manipulation instructions, etc.
mb89490 series 3 n product lineup (continued) part number parameter mb89498 mb89f499 mb89pv490 classification mass production products (mask rom product) flash piggy-back (for evaluation or development) rom size 48 k 8-bit (internal rom) 60 k 8-bit (internal flash) 60 k 8-bit (external rom) * 1 ram size 2 k 8-bit 2 k 8-bit 2 k 8-bit cpu functions number of instructions instruction bit length instruction length data bit length minimum instruction execution time minimum interrupt processing time : 136 : 8-bit : 1 to 3 bytes : 1-bit, 8-bit, 16-bit : 0.32 m s/12.5 mhz : 2.88 m s / 12.5 mhz ports general-purpose i/o ports (cmos) input ports (cmos) n-channel open drain i/o ports total : 56 pins : 2 pins : 8 pins : 66 pins 21-bit timebase timer interrupt generation cycle (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 mhz watchdog timer reset generation cycle (167.8 ms to 335.5 ms) at 12.5 mhz pwm timer 0, 1 8-bit reload timer operation (supports square wave output and operating clock period : 1 t inst , 8 t inst , 16 t inst , 64 t inst ) 8-bit accuracy pwm operation 8/16-bit timer/counter 00, 01 can be operated either as a 2-channel 8-bit timer/counter (timer 00 and timer 01, each with its own independent operating clock) , or as one 16-bit timer/counter. in timer 00 or 16-bit timer/counter operation, event counter operation by external clock input and square wave output capability 8/16-bit timer/counter 10, 11 can be operated either as a 2-channel 8-bit timer/counter (timer 10 and timer 11, each with its own independent operating clock) , or as one 16-bit timer/counter. in timer 10-bit or 16-bit timer/counter operation, event counter operation by external clock input and square wave output capability external interrupt 0 (edge) 8 independent channels (selectable edge, interrupt vector, request flag) external interrupt 1 (level) 8 channels (low level interrupt) a/d converter 10-bit accuracy 8 channels a/d conversion function (conversion time : 30 t inst ) supports repeated activation by internal clock lcd controller/driver common output segment output lcd driving power (bias) pins lcd display ram size : 4 (max) : 32 (max) : 3 : 32 4 bits
mb89490 series 4 (continued) *1 : use mbm27c512 as the external rom. *2 : i 2 c is complied to philips i 2 c specification. part number parameter mb89498 mb89f499 mb89pv490 uart/sio synchronous/asynchronous data transfer capability (max baud rate : 97.656 kbps at 12.5 mhz) (7-bit and 8-bit with parity bit; 8-bit and 9-bit without parity bit) sio 8-bit serial i/o with lsb first/msb first selectability 1 clock selectable from 4 operation clock (1 external shift clock and 3 internal shift clock : 0.64 m s, 2.56 m s, 10.24 m s at 12.5 mhz) i 2 c* 2 1 channel (use a 2-wire protocol to communicate with other device) remote receiver circuit selectable maximum noise width removal reversible input polarity standby mode sleep mode, stop mode, watch mode and sub-clock mode process cmos operating voltage 2.2 v to 3.6 v 2.7 v to 3.6 v 2.7 v to 3.6 v
mb89490 series 5 n package and corresponding products o : availabe : not available n differences among products 1. memory size before evaluating using the piggy-back product, verify its differences from the product that will be actually used. take particular care on the following point : the stack area is set at the upper limit of the ram. 2. current consumption ? for the mb89pv490, add the current consumed by the eprom mounted in the piggy-back socket. ? when operating at low speed, the current consumed by the flash product is greater than that for the mask rom product. however, the current consumption is roughly the same in sleep and stop mode. ? for more information, see n electrical characteristics. 3. oscillation stabilization wait time after power-on reset ? for mb89pv490 and mb89f499, the power-on stabilization wait time cannot be selected after power-on reset. ? for mb89498, the power-on stabilization wait time can be selected after power-on reset. ? for more information, please refer to n mask options. part number parameter mb89498 mb89f499 mb89pv490 fpt-100p-m06 o o fpt-100p-m05 o o mqp-100c-p01 o
mb89490 series 6 n pin assignments (continued) (top view) (fpt-100p-m06) * : high current pins 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 p65/seg21 p64/seg20 p63/seg19 p62/seg18 p61/seg17 p60/seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 p54/com3 p53/com2 com1 com0 v1 v2 v3 v cc v cc *p00 *p01 *p02 *p03 *p04 *p05 *p06 *p07 p10/int00 p11/int01 p12/int02 p13/int03 p14/int04 p15/int05 p16/int06 p17/int07 p20/to0 p21/rmc p22ec0 p23 p24/to1 p25/ec1 p26/pwm0 p27/pwm1 p50/si0 p51/so0 p52/sck0 avr av cc av ss p30/an0/int10 p31/an1/int11 p32/an2/int12 p33/an3/int13 p34/an4/int14 p35/an5/int15 p36/an6/int16 p37/an7/int17 *p40 *p41 *p42 *p43 *p44 *p45 *p46/scl *p47/sda x1a x0a v ss v ss x0 x1 mod0 rst p84 p83 p82/sck1 p81/so1 p80/si1 p77/seg31 p76/seg30 p75/seg29 p74/seg28 p73/seg27 p72/seg26 p71/seg25 p70/seg24 p67/seg23 p66/seg22
mb89490 series 7 (continued) (top view) (fpt-100p-m05) * : high current pins 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 p63/seg19 p62/seg18 p61/seg17 p60/seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 p54/com3 p53/com2 com1 com0 v1 *p02 *p03 *p04 *p05 *p06 *p07 p10/int00 p11/int01 p12/int02 p13/int03 p14/int04 p15/int05 p16/int06 p17/int07 p20/to0 p21/rmc p22/ec0 p23 p24/to1 p25/ec1 p26/pwm0 p27/pwm1 p50/si0 p51/so0 p52/sck0 avr av cc av ss p30/an0/int10 p31/an1/int11 p32/an2/int12 p33/an3/int13 p34/an4/int14 p35/an5/int15 p36/an6/int16 p37/an7/int17 *p40 *p41 *p42 *p43 *p44 *p45 *p46/scl *p47/sda x1a x0a v ss v cc v3 v2 *p01 *p00 v cc v ss x0 x1 mod0 rst p84 p83 p82/sck1 p81/so1 p80/si1 p77/seg31 p76/seg30 p75/seg29 p74/seg28 p73/seg27 p72/seg26 p71/seg25 p70/seg24 p67/seg23 p66/seg22 p65/seg21 p64/seg20
mb89490 series 8 (continued) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 p65/seg21 p64/seg20 p63/seg19 p62/seg18 p61/seg17 p60/seg16 seg15 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 p54/com3 p53/com2 com1 com0 v1 v2 v3 v cc v cc *p00 *p01 *p02 *p03 *p04 *p05 *p06 *p07 p10/int00 p11/int01 p12/int02 p13/int03 p14/int04 p15/int05 p16/int06 p17/int07 p20/to0 p21/rmc p22ec0 p23 p24/to1 p25/ec1 p26/pwm0 p27/pwm1 p50/si0 p51/so0 p52/sck0 avr av cc av ss p30/an0/int10 p31/an1/int11 p32/an2/int12 p33/an3/int13 p34/an4/int14 p35/an5/int15 p36/an6/int16 p37/an7/int17 *p40 *p41 *p42 *p43 *p44 *p45 *p46/scl *p47/sda x1a x0a v ss v ss x0 x1 mod0 rst p84 p83 p82/sck1 p81/so1 p80/si1 p77/seg31 p76/seg30 p75/seg29 p74/seg28 p73/seg27 p72/seg26 p71/seg25 p70/seg24 p67/seg23 p66/seg22 121 122 123 124 125 126 127 128 129 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 130 131 132 101 102 103 104 (top view) (mqp-100c-p01) pin assignment on package top (mb89pv490 only) n.c. : as connected internally, do not use. pin no. pin name pin no. pin name pin no. pin name pin no. pin name pin no. pin name 101 n.c. 108 a3 115 o3 122 o8 129 a8 102 a15 109 a2 116 v ss 123 ce 130 a13 103 a12 110 a1 117 n.c. 124 a10 131 a14 104 a7 111 a0 118 o4 125 oe 132 v cc 105 a6 112 n.c. 119 o5 126 n.c. 106 a5 113 o1 120 o6 127 a11 107 a4 114 o2 121 o7 128 a9 * : high current pins
mb89490 series 9 n pin description (continued) pin number pin name i/o circuit type function mqfp* 1 / qfp* 2 lqfp* 3 99 96 x0 a connection pins for a crystal or other oscillator circuit. an external clock can be connected to x0. in this case, leave x1 open. 98 95 x1 49 46 x0a a connection pins for a crystal or other oscillator circuit. an external clock can be connected to x0a. in this case, leave x1a open. 48 45 x1a 97 94 mod0 b input pin for setting the memory access mode. connect directly to v ss . 95, 94 92, 91 p84, p83 j general-purpose cmos input port. 96 93 rst c reset i/o pin. the pin is an n-ch open-drain type with pull-up resistor and hysteresis input. the pin outputs an l level when an internal reset request is present. inputting an l level initial- izes internal circuits. 2 to 9 99 to 6 p00 to p07 d general-purpose cmos i/o port. 10 to 17 7 to 14 p10/int00 to p17/int07 e general-purpose cmos i/o port. the pin is shared with external interrupt 0 input. 18 15 p20/to0 f general-purpose cmos i/o port. the pin is shared with 8/16-bit timer/counter 00 and 01 output. 19 16 p21/rmc e general-purpose cmos i/o port. the pin is shared with remote receiver input. 20 17 p22/ec0 e general-purpose cmos i/o port. the pin is shared with 8/16-bit timer/counter 00 and 01 input. 21 18 p23 f general-purpose cmos i/o port. 22 19 p24/to1 f general-purpose cmos i/o port. the pin is shared with 8/16-bit timer/counter 10 and 11 output. 23 20 p25/ec1 e general-purpose cmos i/o port. the pin is shared with 8/16-bit timer/counter 10 and 11 input. 24 21 p26/pwm0 f general-purpose cmos i/o port. the pin is shared with pwm0 output. 25 22 p27/pwm1 f general-purpose cmos i/o port. the pin is shared with pwm1 output. 32 to 39 29 to 36 p30/an0/int10 to p37/an7/int17 g general-purpose cmos i/o port. the pin is shared with external interrupt 1 input and a/d converter input. 40 to 45 37 to 42 p40 to p45 h general-purpose n-ch open-drain i/o port. 46 43 p46/scl h general-purpose n-ch open-drain i/o port. the pin is shared with i 2 c clock i/o.
mb89490 series 10 (continued) *1 : mqp-100c-p01 *2 : fpt-100p-m06 *3 : fpt-100p-m05 pin number pin name i/o circuit type function mqfp* 1 / qfp* 2 lqfp* 3 47 44 p47/sda h general-purpose n-ch open-drain i/o port. the pin is shared with i 2 c data i/o. 26 23 p50/si0 e general-purpose cmos i/o port. the pin is shared with sio data input. 27 24 p51/so0 f general-purpose cmos i/o port. the pin is shared with sio data output. 28 25 p52/sck0 e general-purpose cmos i/o port. the pin is shared with sio clock i/o. 57 54 p53/com2 f/i general-purpose cmos i/o port. the pin is shared with the lcd common output. 58 55 p54/com3 f/i general-purpose cmos i/o port. the pin is shared with the lcd common output. 75 to 82 72 to 79 p60/seg16 to p67/seg23 f/i general-purpose cmos i/o port. the pin is shared with lcd segment output. 83 to 90 80 to 87 p70/seg24 to p77/seg31 f/i general-purpose cmos i/o port. the pin is shared with lcd segment output. 91 88 p80/si1 e general-purpose cmos i/o port. the pin is shared with uart/sio data input. 92 89 p81/so1 f general-purpose cmos i/o port. the pin is shared with uart/sio data output. 93 90 p82/sck1 e general-purpose cmos i/o port. the pin is shared with uart/sio clock i/o. 59 to 74 56 to 71 seg0 to seg15 i lcd segment output-only pin. 55, 56 52, 53 com0, com1 i lcd common output-only pin. 54, 53, 52 51, 50, 49 v1 to v3 ? lcd driving power supply pin. 1, 51 98, 48 v cc ? power supply pin. 50, 100 47, 97 v ss ? power supply pin (gnd) . 30 27 av cc ? a/d converter power supply pin. 29 26 avr ? a/d converter reference voltage input pin. 31 28 av ss ? a/d converter power supply pin. use at the same voltage level as v ss .
mb89490 series 11 ? external eprom socket (mb89pv490 only) * : mqp-100c-p01 pin number pin name i/o function mqfp* 102 131 130 103 127 124 128 129 104 105 106 107 108 109 110 111 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins. 122 121 120 119 118 115 114 113 o8 o7 o6 o5 o4 o3 o2 o1 i data input pins. 101 112 117 126 n.c. ? internally connected pins. always leave open. 116 v ss o power supply pin (gnd) . 123 ce o chip enable pin for the eprom. outputs h in standby mode. 125 oe o output enable pin for the eprom. always outputs l. 132 v cc o power supply pin for the eprom.
mb89490 series 12 n i/o circuit type (continued) type circuit remarks a ? main/sub-clock circuit b ? hysteresis input (cmos input in mb89f499) ? the pull-down resistor (not available in mb89f499) approx. 50 k w c ? the pull-up resistor (p-channel) approx. 50 k w ? hysteresis input d ? cmos output ?i oh = - 4 ma, i ol = 12 ma ? cmos input ? selectable pull-up resistor approx. 50 k w e ? cmos output ?i oh = - 2 ma, i ol = 4 ma ? cmos port input ? hysteresis resource input ? selectable pull-up resistor approx. 50 k w x1 (x1a) x0 (x0a) n-ch n-ch stop mode control signal n-ch p-ch p-ch r p-ch n-ch r p-ch pull-up resistor register port n-ch p-ch r p-ch n-ch p-ch r pull-up resistor register port resource
mb89490 series 13 (continued) type circuit remarks f ? cmos output ?i oh = - 2 ma, i ol = 4 ma ? cmos input ? selectable pull-up resistor approx. 50 k w g ? cmos output ?i oh = - 2 ma, i ol = 4 ma ? cmos port input ?v ih = 0.85 v cc , v il = 0.5 v cc resource input ? analog input ? selectable pull-up resistor approx. 50 k w h ? n-ch open-drain output ?i ol = 15 ma ? cmos port input ? cmos resource input ?5 v tolerance i ? lcd segment output j ? cmos input p-ch n-ch p-ch r pull-up resistor register port p-ch n-ch p-ch r pull-up resistor register port resource analog n-ch port/resource p-ch n-ch p-ch n-ch
mb89490 series 14 n handling devices 1. preventing latch-up latch-up may occur on cmos ic if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on 1. absolute maximum ratings in n electrical characteristics is applied between v cc and v ss . when latch-up occurs, power supply current increases rapidly and might thermally damage elements. when using, take great care not to exceed the maximum ratings. also, take care to prevent the analog power supply (av cc and avr) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/d connect to be av cc = v cc and av ss = avr = v ss even if the a/d is not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage stabilization although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. as stabilization guidelines, it is recommended to control voltage fluctuation so that v cc ripple fluctuations (p-p value) will be less than 10 % of the standard v cc value at the commercial frequency (50 hz to 60 hz) and the transient fluctuation rate will be less than 0.1 v/ms at the time of a momentary fluctuation such as when power is switched. 6. precautions when using an external clock even when an external clock is used, oscillation stabilization time is required for power-on reset and wake-up from stop mode. 7. treatment of unused dedicated lcd pins when dedicated lcd pins are not in use, keep them open.
mb89490 series 15 n programming and erasing flash memory on the mb89f499 1. flash memory the flash memory is located between 1000 h and ffff h in the cpu memory map and incorporates a flash memory interface circuit that allows read access and program access from the cpu to be performed in the same way as mask rom. programming and erasing flash memory is also performed via the flash memory interface circuit by executing instructions in the cpu. this enables the flash memory to be updated in place under the control of the internal cpu, providing an efficient method of updating program and data. 2. flash memory features ? 60k bytes 8-bit configuration (16 k + 8 k + 8 k + 28 k sectors) ? automatic algorithm (embedded algorithm* : equivalent to mbm29lv200) ? includes an erase pause and erase restart function ? data polling and toggle bit for detection of program/erase completion ? detection of program/erase completion via cpu interrupt ? compatible with jedec-standard commands ? sector protection (sectors can be combined in any combination) ? no. of program/erase cycles : 10,000 (min) * : embedded algorithm is a trademark of advanced micro devices. 3. procedure for programming and erasing flash memory programming and reading flash memory cannot be performed at the same time. accordingly, to program or erase data to the flash memory, the program must first be copied from flash memory to ram so that programming can be performed without program access from flash memory. 4. flash memory register ? flash memory control status register (fmcs) address 007a h initial value 000x00-0 b bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 r/w r/w r/w r r/w r/w ? r/w inte rdyint we rdy reserved reserved ? reserved
mb89490 series 16 5. sector configuration the table below shows the sector configuration of flash memory and lists the addresses of each sector during cpu access and a flash memory programming. ? sector configuration of flash memory * : the programmer address is the address to be used instead of the cpu address when programming data from a parallel flash memory programmer. use the programmer address on programming or erasing using a general- purpose programmer. 6. rom programmer adaptor and recommended rom programmers * : for the programmer and the version of the programmer,contact the flash support group, inc. inquirues : sunhayato corp. : tel : 81-(3)-3984-7791 fax : 81-(3)-3971-0535 e-mail : adapter@sunhayato.co.jp flash support group, inc. : fax : 81-(53)-428-8377 e-mail : support@j-fsg.co.jp flash memory cpu address programmer address* 16 k bytes ffff h to c000 h 1ffff h to 1c000 h 8 k bytes bfff h to a000 h 1bfff h to 1a000 h 8 k bytes 9fff h to 8000 h 19fff h to 18000 h 28 k bytes 7fff h to 1000 h 17fff h to 11000 h package applicable adapter model recommended writer sunhayato corp. ando electric co. ltd. fpt-100p-m06 flash-100qf-32dp-8lf2 af9708 (ver 1.60 or later) * af9709 (ver 1.60 or later) * fpt-100p-m05 flash-100sqf-32dp-8lf
mb89490 series 17 n programming to the eprom with piggy-back/evaluation device 1. eprom for use mbm27c512-20tv 2. programming socket adapter to program to the prom using an eprom programmer, use the socket adapter (manufacturer : sunhayato corp.) . inquiry : sunhayato corp. : tel : 81-3-3984-7791 fax : 81-3-3971-0535 e-mail : adapter@sunhayato.co.jp 3. memory space memory space corresponding to eprom writer is shown in the diagram below. 4. programming to the eprom (1) set the eprom programmer to the mbm27c512. (2) load program data into the eprom programmer at 1000 h to ffff h . (3) program to 1000 h to ffff h with the eprom programmer. n ice probe pod adaptor of piggy-back/eva chip the following conversion adapter is required to achieve the same pin layout as the fpt-100p-m05. adaptor part number: 100qf-100sqf-8l inquiry : sunhayato corp. : tel : 81-3-3984-7791 fax : 81-3-3971-0535 e-mail : adapter@sunhayato.co.jp package adapter socket part number lcc-32 (rectangle) rom-32lc-28dp-yg 0000 h 0080 h 0880 h 1000 h 1000 h ffff h ffff h i/o ram not available prom 60 kb eprom 60 kb address corresponding addresses on the eprom programmer normal operating mode
mb89490 series 18 n block diagram x0 main clock oscillator circuit 21-bit timebase timer 10-bit a/d converter clock controller reset circuit (watchdog timer) watch prescaler 8-bit pwm timer 0 8-bit pwm timer 1 remote receiver circuit 8/16-bit timer/counter 00, 01 8/16-bit timer/counter 10, 11 external interrupt 0 (edge) external interrupt 1 (level) internal data bus cmos i/o port cmos i/o port cmos i/o port cmos i/o port ram (2 k bytes) rom 48 k bytes/flash 60 k bytes other pins port0* port2 port3 cmos i/o port port8 cmos i/o port lcd controller/driver 32 4-bit display ram (16 bytes) port5 cmos i/o port port6, 7 n-ch open-drain i/o port port4* port1 sub-clock oscillator circuit x1 x0a av cc av ss avr p47 / sda x1a p23 p26 / pwm0 p37 / an7 / int17 to p30 / an0 / int10 p27 / pwm1 p21 / rmc 8 p22 / ec0 p20 / to0 p25 / ec1 p24 / to1 p17 / int07 to p10 / int00 rst 8 p84 p83 p46 / scl p45 to p40 p82 / sck1 p81 / so1 p80 / si1 p52 / sck0 p51 / so0 p50 / si0 6 p54 / com3, p53 / com2 2 p67 / seg23 to p60 / seg16 8 p77 / seg31 to p70 / seg24 8 seg0 to seg15 16 com0, com1 2 v1 to v3 3 2 8 8 i 2 c 16 uart / sio f 2 mc-8l cpu v cc 2, v ss 2, mod0 sio 8 p07 to p00 8 * : high current i/o port.
mb89490 series 19 n cpu core 1. memory space the microcontrollers of the mb89490 series offer a memory space of 64k bytes for storing all of i/o, data, and program areas. the i/o area is located the lowest address. the data area is provided immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end, that is, near the highest address. provide the tables of interrupt/reset vectors and vector call instructions toward the highest address within the program area. the memory space of the mb89490 series is structured as illustrated below. vacant vector table (reset, interrupt, vector call instruction) vacant vacant flash (60 k) external rom (60 k) general- purpose registers general- purpose registers general- purpose registers mb89498 ram rom i / o 0000 h 0080 h 0100 h 0200 h 0880 h 4000 h ffc0 h ffff h mb89f499 ram i / o 0000 h 0080 h 0100 h 0200 h 0880 h 1000 h ffc0 h ffff h mb89pv490 ram i / o 0000 h 0080 h 0100 h 0200 h 0880 h 1000 h ffc0 h ffff h memory space
mb89490 series 20 2. registers the f 2 mc-8l family has 2 types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following registers are provided : the ps can further be divided into higher 8-bit for use as a register bank pointer (rp) and the lower 8-bit for use as a condition code register (ccr) . (see the diagram below.) program counter (pc) : a 16-bit register for indicating instruction storage positions. accumulator (a) : a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t) : a 16-bit register for performing arithmetic operations with the accumulator. when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix) : a 16-bit register for index modification. extra pointer (ep) : a 16-bit pointer for indicating a memory address. stack pointer (sp) : a 16-bit register for indicating a stack area. program status (ps) : a 16-bit register for storing a register pointer and condition code. pc a t ix ep sp ps 16-bit : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h undefined undefined undefined undefined undefined i-flag = 0, il1, 0 = 11 other bits are undefined. initial value va- cancy va- cancy va- cancy h i il1, 0 n z vc 54 rp ps 109876 3210 15 14 13 12 11 rp ccr structure of the program status register
mb89490 series 21 the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for controlling the cpu operations at the time of an interrupt. h-flag : set to 1 when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. clear to 0 otherwise. this flag is for decimal adjustment instructions. i-flag : interrupt is allowed when this flag is set to 1. interrupt is prohibited when the flag is set to 0. clear to 0 at reset. il1, 0 : indicates the level of the interrupt currently allowed. processes an interrupt only if its request is higher than the value indicated by this bit. il1 il0 interrupt level high-low 00 1 high low 01 10 2 11 3 n-flag : set to 1 if the msb is set to 1 as the result of an arithmetic operation. clear to 0 otherwise. z-flag : set to 1 when an arithmetic operation results in 0. clear to 0 otherwise. v-flag : set to 1 if the complement on 2 overflows as a result of an arithmetic operation. clear to 0 if the overflow does not occur. c-flag : set to 1 when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. clear to 0 otherwise. set to the shift-out value in the case of a shift instruction. lower op codes rp generated addresses 0 0 0 0 0 0 0 1 r4 r3 r2 r1 r0 b2 b1 b0 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 conversion rule for actual addresses of the general-purpose register area
mb89490 series 22 the following general-purpose registers are provided : general-purpose registers : an 8-bit register for storing data the general-purpose registers are 8-bit and located in the register banks of the memory. 1 bank contains 8 registers. up to a total of 32 banks can be used on the mb89490 series. the bank currently in use is indicated by the register bank pointer (rp) . this address = 0100 h + 8 (rp) memory area 32 banks r 0 r 1 r 2 r 3 r 4 r 5 r 6 r 7 register bank configuration
mb89490 series 23 n i/o map (continued) address register name register description read/write initial value 00 h pdr0 port 0 data register r/w xxxxxxxx b 01 h ddr0 port 0 direction register w* 00000000 b 02 h pdr1 port 1 data register r/w xxxxxxxx b 03 h ddr1 port 1 direction register w* 00000000 b 04 h pdr2 port 2 data register r/w 00000000 b 05 h (reserved) 06 h ddr2 port 2 direction register r/w 00000000 b 07 h sycc system clock control register r/w x-1mm100 b 08 h stbc standby control register r/w 00010xxx b 09 h wdtc watchdog timer control register w* 0---xxxx b 0a h tbtc timebase timer control register r/w 00---000 b 0b h wpcr watch prescaler control register r/w 00--0000 b 0c h pdr3 port 3 data register r/w xxxxxxxx b 0d h ddr3 port 3 direction register r/w 11111111 b 0e h rsfr reset flag register r xxxx---- b 0f h pdr4 port 4 data register r/w 11111111 b 10 h pdr5 port 5 data register r/w ---xxxxx b 11 h ddr5 port 5 direction register r/w ---00000 b 12 h pdr6 port 6 data register r/w xxxxxxxx b 13 h ddr6 port 6 direction register r/w 00000000 b 14 h pdr7 port 7 data register r/w xxxxxxxx b 15 h ddr7 port 7 direction register r/w 00000000 b 16 h pdr8 port 8 data register r/w ---xxxxx b 17 h ddr8 port 8 direction register r/w ---00000 b 18 h eic0 external interrupt 0 control register 0 r/w 00000000 b 19 h eic1 external interrupt 0 control register 1 r/w 00000000 b 1a h eic2 external interrupt 0 control register 2 r/w 00000000 b 1b h eic3 external interrupt 0 control register 3 r/w 00000000 b 1c h eie1 external interrupt 1 enable register r/w 00000000 b 1d h eif1 external interrupt 1 flag register r/w -------0 b 1e h smr serial mode register r/w 00000000 b 1f h sdr serial data register r/w xxxxxxxx b 20 h t01cr timer 01 control register r/w 000000x0 b 21 h t00cr timer 00 control register r/w 000000x0 b 22 h t01dr timer 01 data register r/w xxxxxxxx b
mb89490 series 24 (continued) address register name register description read/write initial value 23 h t00dr timer 00 data register r/w xxxxxxxx b 24 h t11cr timer 11 control register r/w 000000x0 b 25 h t10cr timer 10 control register r/w 000000x0 b 26 h t11dr timer 11 data register r/w xxxxxxxx b 27 h t10dr timer 10 data register r/w xxxxxxxx b 28 h ader a/d input enable register r/w 11111111 b 29 h adc0 a/d control register 0 r/w -00000x0 b 2a h adc1 a/d control register 1 r/w -0000001 b 2b h addh a/d data register (upper byte) r ------xx b 2c h addl a/d data register (lower byte) r xxxxxxxx b 2d h cntr0 pwm 0 timer control register r/w 0-000000 b 2e h comr0 pwm 0 timer compare register w* xxxxxxxx b 2f h smc0 uart/sio serial mode control register r/w 00000000 b 30 h smc1 uart/sio serial mode control register r/w 00000000 b 31 h ssd uart/sio serial status/data register r/w 00001--- b 32 h sidr/sodr uart/sio serial data register r/w xxxxxxxx b 33 h src uart/sio serial rate control register r/w xxxxxxxx b 34 h cntr1 pwm 1 timer control register r/w 0-000000 b 35 h comr1 pwm 1 timer compare register w* xxxxxxxx b 36 h ibsr i 2 c bus status register r 00000000 b 37 h ibcr i 2 c bus control register r/w 00000000 b 38 h iccr i 2 c clock control register r/w 000xxxxx b 39 h iadr i 2 c address register r/w -xxxxxxx b 3a h idar i 2 c data register r/w xxxxxxxx b 3b h pllcr sub pll control register r/w ----0000 b 3c h to 3f h (reserved) 40 h rmn remote control counter register r xxxxxxxx b 41 h rmc remote control control register r/w 00000000 b 42 h rms remote control status register r/w 0x000001 b 43 h rmd remote control fifo data register r x----xxx b 44 h rmcd0 remote control compare register 0 r/w 11111111 b 45 h rmcd1 remote control compare register 1 r/w 11111111 b 46 h rmcd2 remote control compare register 2 r/w 11111111 b 47 h rmcd3 remote control compare register 3 r/w 11111111 b 48 h rmcd4 remote control compare register 4 r/w 11111111 b
mb89490 series 25 (continued) * : bit manipulation instruction cannot be used. ? read/write access symbols ? initial value symbols address register name register description read/write initial value 49 h rmcd5 remote control compare register 5 r/w 11111111 b 4a h rmci remote interrupt register r/w 0000-000 b 4b h to 5d h (reserved) 5e h locr lcd controller output control register r/w -0000000 b 5f h lcr lcd controller control register r/w 00010000 b 60 h to 6f h vram lcd data ram r/w xxxxxxxx b 70 h pucr0 port 0 pull up resistor control register r/w 11111111 b 71 h pucr1 port 1 pull up resistor control register r/w 11111111 b 72 h pucr2 port 2 pull up resistor control register r/w 11111111 b 73 h pucr3 port 3 pull up resistor control register r/w 11111111 b 74 h pucr5 port 5 pull up resistor control register r/w ---11111 b 75 h pucr6 port 6 pull up resistor control register r/w 11111111 b 76 h pucr7 port 7 pull up resistor control register r/w 11111111 b 77 h pucr8 port 8 pull up resistor control register r/w -----111 b 78 h to 79 h (reserved) 7a h fmcs flash memory control status registger r/w 000x00-0 b 7b h ilr1 interrupt level setting register 1 w* 11111111 b 7c h ilr2 interrupt level setting register 2 w* 11111111 b 7d h ilr3 interrupt level setting register 3 w* 11111111 b 7e h ilr4 interrupt level setting register 4 w* 11111111 b 7f h (reserved) r/w : readable and writable r : read-only w : write-only 0 : the initial value of this bit is 0. 1 : the initial value of this bit is 1. x : the initial value of this bit is undefined. - : unused bit. m : the initial value of this bit is determined by mask option.
mb89490 series 26 n electrical characteristics 1. absolute maximum ratings *1 : the parameter is based on av ss = v ss = 0.0 v. *2 : applicable to pins : p00 to p07, p10 to p17, p20 to p27, p30 to p37, p50 to p52, p80 to p82 use within recommended operating conditions. use at dc voltage (current) . the + b signal should always be applied with a limiting resistance placed between the + b signal and the microcontroller. the value of the limiting resistance should be set so that when the + b signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. (continued) parameter symbol rating unit remarks min max power supply voltage* 1 v cc av cc v ss - 0.3 v ss + 4.0 v av cc must be equal to v cc avr v ss - 0.3 v ss + 4.0 v lcd power supply voltage v1 to v3 v ss - 0.3 v cc v input voltage * 1 v i v ss - 0.3 v cc + 0.3 v except p40 to p47 v ss - 0.3 v ss + 6.0 v p40 to p47 in mb89pv490 and mb89498 v ss - 0.3 v ss + 5.5 v p40 to p47 in mb89f499 output voltage* 1 v o v ss - 0.3 v cc + 0.3 v maximum clamp current i clamp - 2.0 + 2.0 ma *2 total maximum clamp current s |i clamp | ? 20 ma *2 l level maximum output current i ol ? 15 ma l level average output current i olav ? 4ma average value (operating current operating rate) l level total maximum output current s i ol ? 100 ma l level total average output current s i olav ? 40 ma average value (operating current operating rate) h level maximum output current i oh ?- 15 ma h level average output current i ohav ?- 4ma average value (operating current operating rate) h level total maximum output current s i oh ?- 50 ma h level total average output current s i ohav ?- 20 ma average value (operating current operating rate) power consumption p d ? 300 mw operating temperature t a - 40 + 85 c storage temperature tstg - 55 + 150 c
mb89490 series 27 (continued) note that when the microcontroller drive current is low, such as in the power saving modes, the + b input potential may pass through the protective diode and increase the potential at the v cc pin, and this may affect other devices. note that if a + b signal is input when the microcontroller current is off (not fixed at 0 v) , the power supply is provided from the pins, so that incomplete operation may result. note that if the + b input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on result. care must be taken not to leave the + b input pin open. note that analog system input/output pins other than the a/d input pins (lcd drive pins, comparator input pins, etc.) cannot accept + b signal input. sample recommended circuits : warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. p-ch n-ch v cc r ? input/output equivalent circuits + b input (0 v to 16 v) limiting resistance protective diode
mb89490 series 28 2. recommended operating conditions (av ss = v ss = 0.0 v) * : these values depend on the operating conditions and the analog assurance range. see figure 1, 2 and 5. a/d converter electrical characteristics. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the devices electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. figure1 operating voltage vs. main clock operating frequency (mb89f499/498) parameter symbol value unit remarks min max power supply voltage v cc av cc 2.7* 3.6 v normal operation assurance range mb89pv490 and mb89f499 2.2* 3.6 v normal operation assurance range mb89498 1.5 3.6 v retains the ram state in stop mode avr 2.7 3.6 v lcd power supply voltage v1 to v3 vss vcc v operating temperature t a - 40 + 85 c 3.6 3.0 2.7 11.0 10.0 9.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 12.0 12.5 analog accuracy assurance range : v cc = av cc = 2.7 v to 3.6 v main clock operating freq. (mhz) min execution time (inst. cycle) ( m s) 2.2 2.0 0.36 0.4 0.44 4.0 note : the shaded area is not assured for mb89f499 operating voltage (v) 2.0 1.33 1.0 0.8 0.66 0.57 0.50 0.33 0.32
mb89490 series 29 figure2 operating voltage vs. main clock operating frequency (mb89pv490) figure 1 and 2 indicate the operating frequency of the external oscillator at an instruction cycle of 4/f ch . since the operating voltage range is dependent on the instruction cycle, see figure 1 and 2 if the operating speed is switched using a gear. 3.6 3.5 3.0 2.7 11.0 10.0 9.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 12.0 12.5 0.36 0.4 0.44 4.0 2.0 1.33 1.0 0.8 0.66 0.57 0.50 0.33 0.32 analog accuracy assurance range : v cc = av cc = 2.7 v to 3.6 v main clock operating freq. (mhz) min execution time (inst. cycle) ( m s) operating voltage (v)
mb89490 series 30 3. dc characteristics (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) (continued) parameter symbol pin condition value unit remarks min typ max h level input voltage v ih p00 to p07, p10 to p17, p20 to p27, p30 to p37, p50 to p54, p60 to p67, p70 to p77, p80 to p84, scl, sda, ? 0.7 v cc ? v cc + 0.3 v p40 to p47 ? 0.7 v cc ? v ss + 6.0 v mb89498 ? 0.7 v cc ? v ss + 5.5 v mb89f499 v ihs rst , mod0, ec0, ec1, sck0, si0, sck1, si1, rmc, int00 to int07 ? 0.8 v cc ? v cc + 0.3 v v iha int10 to int17 ? 0.85 v cc ? v cc + 0.3 v l level input voltage v il p00 to p07, p10 to p17, p20 to p27, p30 to p37, p40 to p47, p50 to p54, p60 to p67, p70 to p77, p80 to p84, scl, sda, ? v ss - 0.3 ? 0.3 v cc v v ils rst , mod0, ec0, ec1, sck0, si0, sck1, si1, rmc, int00 to int07 ? v ss - 0.3 ? 0.2 v cc v v ila int10 to int17 ? v ss - 0.3 ? 0.5 v cc v open-drain output pin application voltage v d p40 to p47 ? v ss - 0.3 ? v ss + 6.0 v mb89498 ? v ss - 0.3 ? v ss + 5.5 v mb89f499
mb89490 series 31 (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) (continued) parameter symbol pin condition value unit remarks min typ max h level output voltage v oh p10 to p17, p20 to p27, p30 to p37, p50 to p54, p60 to p67, p70 to p77, p80 to p82 i oh = - 2.0 ma 2.2 ?? v p00 to p07 i oh = - 4.0 ma 2.2 ?? v l level output voltage v ol p10 to p17, p20 to p27, p30 to p37, p50 to p54, p60 to p67, p70 to p77, p80 to p82, rst i ol = 4.0 ma ?? 0.4 v p00 to p07 i ol = 12.0 ma ?? 0.4 v p40 to p47 i ol = 15.0 ma ?? 0.4 v input leakage current i li p00 to p07, p10 to p17, p20 to p27, p30 to p37, p40 to p47, p50 to p54, p60 to p67, p70 to p77, p80 to p84 0.45 v < v i < v cc - 5 ?+ 5 m a without pull-up resistor open-drain output leakage current i lod p40 to p47 0.0 v < v i < v cc - 5 ?+ 5 m a pull-down resistance r down mod0 v i = v cc 25 50 100 k w except mb89f499 pull-up resistance r pull p00 to p07, p10 to p17, p20 to p27, p30 to p37, p50 to p54, p60 to p67, p70 to p77, p80 to p82, rst v i = 0.0 v 25 50 100 k w when pull-up resistor is selected (except rst ) common output impedance r vcom com0 to com3 v1 to v3 = + 3.0 v ?? 2.5 k w
mb89490 series 32 (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) (continued) parameter symbol pin condition value unit remarks min typ max segment output impedance r vseg seg0 to seg31 v1 to v3 = + 3.0 v ?? 15 k w lcd divided resistance r lcd ? between v cc and v ss 300 500 750 k w lcd controller/ driver leakage current i lcdl v1 to v3, com0 to com3, seg0 to seg31 ?- 1 ?+ 1 m a power supply current i cc1 v cc f ch = 12.5 mhz t inst = 0.33 m s main clock run mode ? 8.0 12 ma mb89f499 ? 7.0 12.0 ma mb89498 i cc2 f ch = 12.5 mhz t inst = 5.33 m s main clock run mode ? 1.0 3.0 ma mb89f499 mb89498 i ccs1 f ch = 12.5 mhz t inst = 0.33 m s main clock sleep mode ? 3.0 5.0 ma mb89f499 mb89498 i ccs2 f ch = 12.5 mhz t inst = 5.33 m s main clock sleep mode ? 0.6 2.0 ma mb89f499 mb89498 i ccl f cl = 32.768 khz sub-clock mode t a = + 25 c ? 40.0 60.0 m a mb89f499 mb89498 i cclpll f cl = 32.768 khz sub-clock mode t a = + 25 c sub pll 4 ? 180.0 250.0 m a mb89f499 mb89498 i ccls f cl = 32.768 khz sub-clock sleep mode t a = + 25 c ? 14.0 30.0 m a mb89f499 mb89498 i cct f cl = 32.768 khz watch mode main clock stop mode t a = + 25 c ? 1.5 13.0 m a mb89f499 mb89498
mb89490 series 33 (continued) (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) parameter symbol pin condition value unit remarks min typ max power supply current i cch v cc t a = + 25 c sub-clock stop mode ? 0.8 4.0 m a mb89f499 mb89498 i a av cc av cc = 3.0 v, t a = + 25 c ? 1.2 4.4 ma a/d converting i ah t a = + 25 c ? 0.8 4.0 m aa/d stop input capacitance c in except v cc , v ss , av cc , av ss , avr f = 1 mhz ? 10.0 ? pf
mb89490 series 34 4. ac characteristics (1) reset timing (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) note : t hcyl is the oscillation cycle (1/f ch ) to input to the x0 pin. the mcu operation is not guaranteed when the l pulse width is shorter than t zlzh . (2) power-on reset (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) note : make sure that power supply rises within the selected oscillation stabilization time. rapid changes in power supply voltage may cause a power-on reset. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min max rst l pulse width t zlzh ? 48 t hcyl ? ns parameter symbol condition value unit remarks min max power supply rising time t r ? ? 50 ms power supply cut-off time t off 1 ? ms due to repeated operations t zlzh 0.2 v cc 0.2 v cc rst 0.2 v 0.2 v 0.2 v t r v cc t off 1.5 v
mb89490 series 35 (3) clock timing (av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) parameter symbol pin value unit remarks min typ max clock frequency f ch x0, x1 1 ? 12.5 mhz f cl x0a, x1a ? 32.768 75 khz clock cycle time t hcyl x0, x1 80 ? 1000 ns t lcyl x0a, x1a 13.3 30.5 ?m s input clock pulse width p wh p wl x0 20 ?? ns external clock p whl p wll x0a ? 15.2 ?m s input clock rising/falling time t cr t cf x0, x0a ?? 10 ns p wh 0.2 v cc x0 0.2 v cc x0 when a crystal or ceramic resonator is used when an external clock is used x1 x0 x1 0.2 v cc 0.8 v cc 0.8 v cc t cr t cf t hcyl p wl f ch f ch open c 1 c 2 x0 and x1 timing and conditions main clock conditions
mb89490 series 36 (4) instruction cycle parameter symbol value (typical) unit remarks instruction cycle (minimum execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch m s (4/f ch ) t inst = 0.32 m s when operating at f ch = 12.5 mhz 2/f cl , 1/2f cl m s (2/f cl ) t inst = 61.036 m s when operating at f cl = 32.768 khz x0a x1a c 0 c 1 rd x0a x1a open f cl 0.8 v cc t lcyl 0.2 v cc p whl p wll t cf t cr x0a f cl x0a x1a open when a crystal or ceramic resonator is used when an external clock is used when an subclock is not used sub-clock timing and conditions sub-clock conditions
mb89490 series 37 3.6 operating voltage (v) subpll operating guarantee range internal operating clock freq. (khz) min execution time (inst. cycle) ( m s) multiplied by 4 oscillation clock f cl (khz) instruction cycle, t inst (min. exec. time) ( m s) 3.0 2.7 2.5 2.0 131.072 15.625 not assured for mb89f499 and mb89pv490. 15.625 6.67 300 6.67 75 32.768 relationship between sub-clock oscillating frequency and instruction cycle when sub pll is enabled pll operation guarantee range (sub pll 4) relationship between internal operating clock frequency and power supply voltage
mb89490 series 38 (5) serial i/o timing (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin condition value unit min max serial clock cycle time t scyc sck0, sck1 internal shift clock mode 2 t inst * ?m s sck ? so time t slov sck0, sck1, so0, so1 - 200 200 ns valid si ? sck - t ivsh si0, si1, sck0, sck1 1/2 t inst * ?m s sck - ? valid si hold time t shix sck0, sck1, si0, si1 1/2 t inst * ?m s serial clock h pulse width t shsl sck0, sck1 external shift clock mode 1 t inst * ?m s serial clock l pulse width t slsh 1 t inst * ?m s sck ? so time t slov sck0, sck1, so0, so1 0 200 ns valid si ? sck - t ivsh si0, si1, sck0, sck1 1/2 t inst * ?m s sck - ? valid si hold time t shix sck0, sck1, si0, si1 1/2 t inst * ?m s 0.8 v 2.4 v t scyc 2.4 v 0.2 v cc t shix 0.8 v 0.8 v t ivsh 0.8 v cc 0.2 v cc 0.8 v cc sck0, sck1 so0, so1 si0, si1 t slov 0.2 v cc 0.8 v cc t slsh 2.4 v 0.2 v cc 0.8 v cc 0.8 v 0.8 v cc 0.2 v cc 0.8 v cc sck0, sck1 so0, so1 si0, si1 0.2 v cc t shsl t shix t ivsh t slov internal clock operation external clock operation
mb89490 series 39 (6) i 2 c timing (v cc = 3.0v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) *1 : for information in t inst , see (4) instruction cycle. *2 : m is defined in the i 2 c clock control register iccr bit 4 and bit 3 (cs4 and cs3). for details, please refer to the h/w manual register explanation. *3 : n is defined in the i 2 c clock control register iccr bit 2 to bit 0 (cs2 to cs0). *4 : when the interrupt period is greater than scl l width, sda and scl output (standard) value is based on hypothesis when rising time is 0 ns. parameter symbol pin value unit remarks min max start condition output t sta scl sda 1/4 t inst * 1 m n - 20 1/4 t inst m n + 20 ns at master mode stop condition output t sto scl sda 1/4 t inst (m n + 8) - 20 1/4 t inst (m* 2 n* 3 + 8) + 20 ns at master mode start condition detect t sta scl sda 1/4 t inst 6 + 40 ? ns stop condition detect t sto scl sda 1/4 t inst 6 + 40 ? ns re-start condition output t stasu scl sda 1/4 t inst (m n + 8) - 20 1/4 t inst (m n + 8) + 20 ns at master mode re-start condition detect t stasu scl sda 1/4 t inst 4 + 40 ? ns scl output low width t low scl 1/4 t inst m n - 20 1/4 t inst m n + 20 ns at master mode scl output high width t high scl 1/4 t inst (m n + 8) - 20 1/4 t inst (m n + 8) + 20 ns at master mode sda output delay t do sda 1/4 t inst 4 - 20 1/4 t inst 4 + 20 ns sda output setup time after interrupt t dosu sda 1/4 t inst 4 - 20 ? ns *4 scl input low pulse width t low scl 1/4 t inst 6 + 40 ? ns scl input high pulse width t high scl 1/4 t inst 2 + 40 ? ns sda input setup time t su sda 40 ? ns sda hold time t ho sda 0 ? ns
mb89490 series 40 9 ack t do t ho t su t dosu t do t ho t low t sta sda scl 1 t stasu sda scl 67 8 9 t su t high t low t ho t do t do t dosu t sto ack data transmit (master/slave) data receive (master/slave)
mb89490 series 41 (7) peripheral input timing (av cc = v cc = 3.0 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : for information on t inst , see (4) instruction cycle. parameter symbol pin value unit remarks min max peripheral input h pulse width 1 t ilih1 ec0, ec1, int00 to int07, int10 to int17 2 t inst * ?m s peripheral input l pulse width 1 t ihil1 2 t inst * ?m s 0.2 v cc 0.8 v cc t ihil1 0.8 v cc ec0, ec1, int00 to int07 0.2 v cc t ilih1 0.5 v cc 0.85 v cc t ihil1 0.85 v cc int10 to int17 0.5 v cc t ilih1
mb89490 series 42 5. a/d converter electrical characteristics (1) a/d converter electrical characteristics (av cc = v cc = 2.7 v to 3.6 v, av ss = v ss = 0.0 v, t a = - 40 c to + 85 c) * : for information on t inst , see (4) instruction cycle in 4. ac characteristics. parameter symbol pin value unit remarks min typ max resolution ? ? ? 10 ? bit total error ?? 3.0 lsb linearity error ?? 2.5 lsb differential linearity error ?? 1.9 lsb zero transition voltage v ot av ss - 1.5 lsb av ss + 0.5 lsb av ss + 2.5 lsb mv full-scale transition voltage v fst av cc - 3.5 lsb av cc - 1.5 lsb av cc - 0.5 lsb mv a/d mode conversion time ? 30 t inst * ??m s analog port input current i ain an0 to an7 ?? 10 m a analog input voltage v ain av ss ? avr v reference voltage ? avr av ss + 2.7 ? av cc v reference voltage supply current i r ? 95.0 170.0 m a a/d is activated i rh ?? 4.0 m a a/d is stopped
mb89490 series 43 (2) a/d converter glossary ? resolution analog changes that are identifiable with the a/d converter. when the number of bits is 10, analog voltage can be divided into 2 10 = 1024. ? linearity error (unit : lsb) the deviation of the straight line connecting the zero transition point (00 0000 0000 ? 00 0000 0001) with the full-scale transition point (11 1111 1111 ? 11 1111 1110) from actual conversion characteristics. ? differential linearity error (unit : lsb) the deviation of input voltage needed to change the output code by 1 lsb from the theoretical value. ? total error (unit : lsb) the difference between theoretical and actual conversion values. (continued) 0.5 lsb 1 lsb av ss 1.5 lsb 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av cc av ss v nt 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av cc {1 lsb n + v ot } v fst v ot analog input theoretical i/o characteristics ideal characteristics analog input actual conversion characteristics total error actual conversion characteristics digital output digital output total error = v nt - {1 lsb n + 0.5 lsb} 1 lsb 1 lsb = v fst - v ot 1022 (v) av ss 004 h 003 h 002 h 001 h av cc 3ff h 3fe h 3fd h 3fc h analog input zero transition error theoretical characteristics analog input actual conversion characteristics full-scale transition error actual conversion characteristics digital output digital output actual conversion characteristics actual conversion characteristics v ot (actual measurement value) v fst (actual measurement value)
mb89490 series 44 (continued) av ss 3ff h 3fe h 3fd h 004 h 003 h 002 h 001 h av cc av ss v nt v (n + 1)t n + 1 n n C 1 n C 2 av cc v nt {1 lsb n + v ot } analog input linearity error ideal value analog input actual conversion characteristics differential linearity error v ot (actual measurement value) actual conversion characteristics actual conversion characteristics digital output digital output differential linearity error = 1 lsb v (n + 1)t - v nt - 1 actual conversion characteristics ideal value linearity error = v nt - {1 lsb n + v ot } 1 lsb v fst (actual measurement value)
mb89490 series 45 (3) notes on using a/d converter about the external impedance of the analog input and its sampling time ? a/d converter with sample and hold circuit. if the external impedance is too high to keep sufficient sampling time, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting a/d conversion precision. ? to satisfy the a/d conversion precision standard, consider the relationship between the external impedance and minimum sampling time and either adjust the resistor value and operating frequency or decrease the external impedance so that the sampling time is longer than the minimum value. ? if the sampling time cannot be sufficient, connect a capacitor of about 0.1 m f to the analog input pin. ? about errors as |avrh - av ss | becomes smaller, values of relative errors grow larger. r c analog input circuit model note : the values are reference values. analog input during sampling : on comparator rc mb89498 2.4 k w (max) 44.0 pf (max) mb89f499 2.4 k w (max) 28.6 pf (max) mb89f499 mb89498 100 90 80 70 50 60 40 30 20 10 0 0 5 10 15 20 25 30 35 mb89f499 mb89498 20 18 16 14 10 12 8 6 4 2 0 012345 78 6 (external impedance = 0 k w to 100 k w ) (external impedance = 0 k w to 20 k w ) minimum sampling time [ m s] minimum sampling time [ m s] external impedance [k w ] external impedance [k w ] the relationship between external impedance and minimum sampling time
mb89490 series 46 n example characteristics (1) l level output voltage (continued) v cc = 2.0 v 0.25 0.20 0.15 0.10 0.05 0.00 010 24 8 6 v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v ol vs i ol (mb89498) v ol [v] i ol [ma] t a = + 25 ? c v cc = 2.0 v v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 4.0 v v cc = 3.5 v v ol vs i ol (mb89f499) 0.30 0.20 0.15 0.10 0.05 0.00 010 24 8 6 0.25 t a = + 25 ? c v ol [v] i ol [ma] v cc = 2.0 v 0.20 0.16 0.12 0.08 0.02 0.00 010 24 8 6 v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v ol vs i ol (mb89498) t a = + 25 ? c v ol [v] i ol [ma] v cc = 2.0 v 0.20 0.16 0.12 0.08 0.04 0.00 010 24 8 6 v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v ol vs i ol (mb89f499) t a = + 25 ? c v ol [v] i ol [ma] port 0 port 0 port 4 port 4
mb89490 series 47 (continued) (2) h level output voltage (continued) v cc = 2.0 v 0.8 0.6 0.4 0.2 0.0 010 24 8 6 v cc = 2.5 v v cc = 3.0 v v cc = 2.7 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v ol vs i ol (mb89498) v ol [v] i ol [ma] t a = + 25 ? c v cc = 2.0 v v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v ol vs i ol (mb89f499) 0.8 0.6 0.4 0.2 0.0 010 24 8 6 i ol [ma] v ol [v] t a = + 25 ? c other than port 0, port 4 other than port 0, port 4 v cc = 2.0 v 0.7 0.6 0.5 0.3 0.2 0.0 0 - 10 - 2 - 4 - 8 - 6 v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v cc - v oh vs i oh (mb89498) v cc - v oh [v] i oh [ma] t a = + 25 ? c 0.4 0.1 v cc = 2.0 v 1.0 0.8 0.6 0.4 0.2 0.0 0 - 10 - 2 - 4 - 8 - 6 v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v cc - v oh vs i oh (mb89f499) v cc - v oh [v] i oh [ma] t a = + 25 ? c port 0 port 0
mb89490 series 48 (continued) (3) power supply current (external clock) (continued) v cc = 2.0 v 1.4 1.2 1.0 0.4 0.2 0.0 0 - 10 - 2 - 4 - 8 - 6 v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 3.5 v v cc = 4.0 v v cc - v oh vs i oh (mb89498) v cc - v oh [v] i oh [ma] t a = + 25 ? c 0.8 0.6 v cc = 2.0 v v cc = 2.5 v v cc = 2.7 v v cc = 3.0 v v cc = 3.3 v v cc = 4.0 v v cc = 3.5 v v cc - v oh vs i oh (mb89f499) 1.4 0.8 0.6 0.4 0.2 0.0 0 - 10 - 2 - 4 - 8 - 6 1.0 i oh [ma] v cc - v oh [v] t a = + 25 ? c 1.2 other than port 0 other than port 0 10.0 8.0 6.0 4.0 2.0 0.0 15 234 i cc1 vs v cc (mb89498) i cc1 [ma] v cc [v] t a = + 25 ? c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 12.0 10.0 8.0 6.0 4.0 0.0 15 234 i cc1 vs v cc (mb89f499) i cc1 [ma] v cc [v] t a = + 25 ? c f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz f ch = 12.5 mhz 2.0
mb89490 series 49 (continued) 4.5 3.5 2.5 2.0 1.0 0.0 15 234 i ccs1 vs v cc (mb89498) i ccs1 [ma] v cc [v] t a = + 25 ? c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 4.0 3.0 1.5 0.5 3.5 2.5 2.0 1.0 0.0 15 234 i ccs1 vs v cc (mb89f499) i ccs1 [ma] v cc [v] t a = + 25 ? c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 4.0 3.0 1.5 0.5 1.4 1.2 0.8 0.6 0.2 0.0 15 234 i cc2 vs v cc (mb89498) i cc2 [ma] v cc [v] t a = + 25 ? c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 1.0 0.4 1.4 1.2 1.0 0.6 0.4 0.0 15 234 i cc2 vs v cc (mb89f499) i cc2 [ma] v cc [v] t a = + 25 ? c f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz f ch = 12.5 mhz 0.2 0.8
mb89490 series 50 (continued) 1.0 0.8 0.6 0.4 0.2 0.0 15 234 i ccs2 vs v cc (mb89498) i ccs2 [ma] v cc [v] t a = + 25 ? c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 1.0 0.8 0.6 0.4 0.0 15 234 i ccs2 vs v cc (mb89f499) i ccs2 [ma] v cc [v] t a = + 25 ? c f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz f ch = 12.5 mhz 0.2 0.30 0.25 0.20 0.10 0.05 0.00 15 234 i cclpll vs v cc (mb89498) i cclpll [ma] v cc [v] t a = + 25 ? c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 0.15 0.30 0.25 0.20 0.15 0.10 0.00 15 234 i cclpll vs v cc (mb89f499) i cclpll [ma] v cc [v] t a = + 25 ? c f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz f ch = 12.5 mhz 0.05
mb89490 series 51 (continued) 60.0 50.0 40.0 30.0 10.0 0.0 15 234 i ccl vs v cc (mb89498) i ccl [ m a] v cc [v] t a = + 25 ? c f cl = 32.768 khz 20.0 60.0 50.0 40.0 30.0 10.0 0.0 15 234 i ccl vs v cc (mb89f499) i ccl [ m a] v cc [v] t a = + 25 ? c f cl = 32.768 khz 20.0 20.0 16.0 12.0 8.0 4.0 0.0 15 234 i ccls vs v cc (mb89498) i ccls [ m a] v cc [v] t a = + 25 ? c f cl = 32.768 khz 20.0 16.0 12.0 4.0 0.0 15 234 i ccls vs v cc (mb89f499) i ccls [ m a] v cc [v] t a = + 25 ? c f cl = 32.768 khz 8.0
mb89490 series 52 (continued) (4) pull-up resistance 2.0 1.6 1.2 0.4 0.0 15 234 i cct vs v cc (mb89498) i cct [ m a] v cc [v] t a = + 25 ? c f cl = 32.768 khz 0.8 2.0 1.6 1.2 0.4 0.0 15 234 i cct vs v cc (mb89f499) i cct [ m a] v cc [v] t a = + 25 ? c f cl = 32.768 khz 0.8 200 160 80 45 0 1.5 3.5 2.0 2.5 3.0 r pull vs v cc (mb89498) r pull [k w ] v cc [v] t a = + 25 ? c t a = + 110 ? c t a = + 25 ? c t a = - 40 ? c 120 4.5 4.0 120 100 80 40 20 0 2.0 4.5 2.5 3.0 4.0 r pull vs v cc (mb89f499) r pull [k w ] v cc [v] t a = + 25 ? c t a = + 110 ? c t a = + 25 ? c t a = - 40 ? c 60 3.5
mb89490 series 53 n mask options n ordering information part number mb89498 mb89f499 mb89pv490 specifying procedure specify when ordering mask setting not possible main clock oscillation stabilizationtime selection 2 10 /f ch 2 14 /f ch 2 18 /f ch selectable fixed to oscillation stabilization wait time of 2 18 /f ch part number package remarks mb89498pf mb89f499pf 100-pin plastic qfp (fpt-100p-m06) mb89498pfv mb89f499pfv 100-pin plastic lqfp (fpt-100p-m05) mb89pv490cf 100-pin ceramic mqfp (mqp-100c-p01)
mb89490 series 54 n package dimensions (continued) 100-pin ceramic mqfp (mqp-100c-p01) dimensions in mm (inches) . note : the values in parentheses are reference values. c 1994 fujitsu limited m100001sc-1-2 15.58?.20 (.613?008) 16.30?.33 (.642?013) 18.70(.736)typ index area 0.30(.012) typ 1.27?.13 (.050?005) 22.30?.33 (.878?013) 24.70(.972) typ 10.16(.400) typ 12.02(.473) typ 14.22(.560) typ 18.12?.20 (.713?008) 1.27?.13 (.050?005) 0.30(.012)typ 7.62(.300)typ 9.48(.373)typ 11.68(.460)typ 0.15?.05 (.006?002) 10.82(.426) max 0.30?.08 (.012?003) .047 ?008 +.016 ?.20 +0.40 1.20 0.30?.08 (.012?003) 0.65?.15 (.0256?0060) 18.85(.742) typ 0.65?.15 (.0256?0060) 12.35(.486)typ .047 ?008 +.016 ?.20 +0.40 1.20
mb89490 series 55 (continued) 100-pin plastic qfp (fpt-100p-m06) note 1) * : these dimensions do not include resin protrusion. note 2) pins width and pins thickness include plating thickness. note 3) pins width do not include tie bar cutting remainder. dimensions in mm (inches) . note : the values in parentheses are reference values. c 2002 fujitsu limited f100008s-c-5-5 1 30 31 50 51 80 81 100 20.000.20(.787.008) 23.900.40(.941.016) 14.000.20 (.551.008) 17.900.40 (.705.016) index 0.65(.026) 0.320.05 (.013.002) m 0.13(.005) "a" 0.170.06 (.007.002) 0.10(.004) details of "a" part (.035.006) 0.880.15 (.031.008) 0.800.20 0.25(.010) 3.00 +0.35 C0.20 +.014 C.008 .118 (mounting height) 0.250.20 (.010.008) (stand off) 0~8 ? * *
mb89490 series 56 (continued) 100-pin plastic lqfp (fpt-100p-m05) note 1) * : these dimensions do not include resin protrusion. note 2) pins width and pins thickness include plating thickness. note 3) pins width do not include tie bar cutting remainder. dimensions in mm (inches) . note : the values in parentheses are reference values. c 2003 fujitsu limited f100007s-c-4-6 14.000.10(.551.004)sq 16.000.20(.630.008)sq 125 26 51 76 50 75 100 0.50(.020) 0.200.05 (.008.002) m 0.08(.003) 0.1450.055 (.0057.0022) 0.08(.003) "a" index .059 C.004 +.008 C0.10 +0.20 1.50 (mounting height) 0 ? ~8 ? 0.500.20 (.020.008) 0.600.15 (.024.006) 0.25(.010) 0.100.10 (.004.004) details of "a" part (stand off) *
mb89490 series fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of fujitsu or any third party or does fujitsu warrant non-infringement of any third-partys intellectual property right or other right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0410 ? 2004 fujitsu limited printed in japan

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